OPRA Decode Engine

400GbE, Low-Latency OPRA (Options Price Reporting Authority) Decode

The Challenges of Handling 400G

At 400GbE, data widths increase and clock periods decrease, meaning more data can be delivered, faster. Software solutions simply cannot cope with this ‘firehouse’ of data; bespoke FPGA implementations are essential to handle the sheer volume of data processing required on every clock cycle and to maintain low latency.


Hero Image OPRA
opra dashboard v4

Telesoft’s OPRA Decode Engine

Powered by Intel’s Agilex® 7 I-Series FPGA, the OPRA Decode Engine can handle 400 Gigabit Ethernet (400GbE) connections and perform real-time line-rate data processing, superseding other existing products on the market. Paired with Telesoft’s bespoke, accelerated FPGA capabilities, sustained line-rate OPRA decode at 400Gbps with ultra-low latency and sophisticated processing capability is readily available.


opra graph

FPGA is Key

Packet Classifier

The Packet Classifier extracts each packet’s Internet Protocol Version and removes any VLANs. IPv4 and IPv6 are supported, as well as up to 3 VLA tags.

PACKET CLASSIFIER

OPRA Decode Engine

The OPRA Decode Engine extracts all short and long equity and index quote messages, equity and index last sales messages, and open interest messages from the received network traffic.

opra decode engine

OPRA Message Filter

The OPRA Message Filter allows extracted messages to be filtered in or out, meaning only the relevant messages are passed up to the host for further processing. Messages can be filtered by participant ID, message category, message type, and session indicator.

message filter

MCDMA PCIe Gen5

Filtered messages are sent up to the host over PCIe Gen5, in a 64-byte fixed-format for efficient processing.

MCDMA

Revolutionising High-speed Data Processing

Revolutionising High-speed Data Processing Telesoft are proud to announce the launch of our latest PCI Express (PCIe) processing card - the MPAC 7000. As the next generation of our high-performance processing cards, the MPAC 7000 sets a new standard for speed, efficiency, and reliability when working with vast data sets.

- Powered by Intel’s Agilex® 7 I-Series FPGA - 2 x QSFP-DD interfaces supporting 2 x 400GbE, or 2 x 100GbE - PCIe gen5 x 16 lane interface for delivery of 400Gbps to the host - Built-in FPGA block or allow list filtering for reduced host processing - Kernel bypass direct from DMA to user space using DPDK - On-host DDR5 memory for low latency data manipulation

smaller 7000
REVOLUTIONISING HIGH-SPEED DATA PROCESSING

MPAC 7000 Card Datasheet

As the next generation of our high-performance processing cards, the MPAC 7000 sets a new standard for speed, efficiency, and reliability when working with vast data sets.

Learn more about our capability

OPRA Decode Datasheet

High rate, low latency decode

By submitting this form you agree to our .


We do not share any details with third parties. Please see our Privacy Policy in relation to how we handle this information.