NGN networks dramatically improve transmission efficiency, with the ability to deliver many thousands of concurrent call sessions across high-speed trunks. But the sheer volume of data complicates matters for applications that are required to monitor and capture data from these connections, such as traffic management, flow control, policy reporting and policy enforcement.

It is widely recognised that network-based policies will be essential to ambitions to introduce differentiated charging schemes. This requires the ability to understand traffic being conveyed over high-speed links. For efficiency, it’s best to tap directly into such links, but this must be done passively in order not to disrupt line traffic. What’s more, although bigger pipes mean more efficient transport of large quantities of data, this makes traditional solutions with largely host-based processing unable to keep up with demands.

An alternative solution is to use specialised hardware to provide dedicated pre-processing of signalling information and bearer traffic. Such hardware can offload the demanding packet processing requirements from host CPUs. The hardware accelerator should be able to:

1. Capture packets from both signalling and media
2. Process all incoming packets
3. Selectively process and filter SIP packets
4. Deliver packets to the host DPI application on a selective basis

For example, at stage 1, a hardware acceleration solution, such as the MPAC-IP card aligns to the layer 2 protocol using Ethernet or PoS framing, and captures every packet on the network node. In the PoS case, the MPAC-IP card extracts IP packets from whatever format they’re carried – (e.g. ATM, PPP, or raw Ethernet over SDH). In the Ethernet case, the MPAC-IP card captures complete Ethernet packets for processing and delivery.

At stage 2, the MPAC-IP card generates a precision timestamp for each packet it receives, maps and classifies the protocol stack, and generates a hash code to group packets from common flows.

The MPAC-IP card’s stage 3 processing layer filters packets to ensure that only interesting packets are delivered to the DPI application. When each packet arrives at the stage 3 processing layer, the MPAC-IP card compares it against a list of criteria defined by the DPI application. Parsing the SIP packets, it also aids the DPI application to track SIP session state.

Once the MPAC-IP card has filtered and pre-processed the packets, it needs to deliver them, along with associated metadata, to the DPI application running on the host server. To minimize CPU requirements on the host server, the MPAC-IP card writes directly to packet monitoring queue memory on the host server using a DMA mechanism.

By using hardware acceleration solutions, the task of identifying, filtering and processing the vast amounts of data required applications such as policy reporting and enforcement can be considerably eased, ensuring that solutions can scale to meet the demands of the networks of today – and tomorrow.

Hardware acceleration is the perfect complement to existing solutions, enabling them to scale and to operate with greater efficiency across a complete high-speed network infrastructure. As the importance of network-wide policy reporting and enforcement architectures is recognised and with ever growing volumes of traffic, this is a problem that cannot be ignored.